Blog & Insights

Understanding Multilayer PCB Stackups and Design

As electronic devices become more complex and compact, multilayer printed circuit boards have become the standard for most applications. A well-planned stackup is the foundation of a successful multilayer PCB design, directly affecting signal integrity, power distribution, thermal performance, and electromagnetic compatibility. Understanding how stackups work and how to plan them is essential for any engineer working with multilayer boards.

What Are Multilayer PCBs?

Multilayer PCBs consist of three or more conductive copper layers bonded together with insulating prepreg and core materials under heat and pressure. Unlike double-sided boards where all components and traces are on the outer surfaces, multilayer boards use internal layers for additional routing, power planes, and ground planes. This construction enables much higher circuit density and allows designers to create complex routing that would be impossible on simpler board constructions.

The layers are connected through plated through-hole vias, blind vias, buried vias, or microvias, providing electrical interconnection between the different conductive layers of the board.

Common Layer Counts and Their Applications

The number of layers in a PCB is typically determined by routing complexity, signal integrity requirements, and power distribution needs. Different applications gravitate toward specific layer counts based on their performance requirements and cost constraints.

Four-layer boards are the most common multilayer configuration, typically consisting of two signal layers on the outer surfaces and a power plane and ground plane on the inner layers. This configuration provides good signal integrity for many applications and is widely used in consumer electronics, industrial controls, and embedded systems.

Six-layer boards add two additional signal or plane layers, providing more routing capacity and better signal integrity. They are commonly used in networking equipment, automotive electronics, and more complex embedded systems where additional routing channels or improved EMI performance are required.

Eight-layer and higher layer counts are used in high-speed digital designs, telecommunications equipment, medical devices, and aerospace applications. These boards provide dedicated reference planes for multiple signal layers, enabling controlled impedance routing and superior EMI performance.

Signal Integrity Considerations

Signal integrity is one of the primary reasons for carefully planning a multilayer stackup. High-speed signals require controlled impedance routing, which depends on the dielectric thickness between the signal layer and its adjacent reference plane. By planning the stackup with consistent dielectric thicknesses, designers can achieve predictable impedance values throughout the board.

The spacing between signal layers and their reference planes also affects crosstalk between adjacent traces. Keeping signal layers closely coupled to their reference planes while maintaining adequate spacing between different signal layers minimises unwanted coupling and improves overall signal quality.

Power and Ground Plane Design

Dedicated power and ground planes on inner layers provide low-impedance paths for distributing power throughout the board. A continuous ground plane directly beneath a signal layer provides the return current path, minimising loop area and reducing electromagnetic emissions.

When designing power planes, consider the current requirements of each power rail and ensure that the plane copper is sufficient to carry the required current without excessive voltage drop. Where multiple power rails share a layer, use copper splits carefully to maintain adequate current capacity while keeping the ground plane as continuous as possible.

Impedance Control

Controlled impedance routing is essential for high-speed digital and RF designs. The characteristic impedance of a trace depends on its width, the copper thickness, the dielectric constant of the surrounding material, and the distance to the reference plane. A well-planned stackup with defined dielectric thicknesses allows designers to calculate and achieve target impedance values consistently.

Common impedance targets include 50 ohms for single-ended signals and 90 or 100 ohms for differential pairs. Working with your PCB manufacturer during the stackup planning phase ensures that the target impedances are achievable with standard materials and manufacturing tolerances.

Material Selection

The choice of PCB laminate material significantly impacts performance, reliability, and cost. Different applications require different material properties, and understanding these trade-offs is key to making the right selection.

• FR-4 — The most widely used PCB material, suitable for general-purpose applications up to approximately 1 GHz. FR-4 offers a good balance of electrical performance, mechanical strength, and cost.
• High-Tg FR-4 — Offers a higher glass transition temperature (170-180 degrees Celsius compared to 130-140 degrees Celsius for standard FR-4), making it suitable for lead-free soldering processes and applications requiring operation at elevated temperatures.
• Rogers — High-frequency laminates with low dielectric loss, designed for RF and microwave applications. Rogers materials provide stable dielectric constants across frequency and temperature, essential for precision high-frequency circuits.
• Isola — A range of high-performance laminates offering various combinations of dielectric constant, loss tangent, and thermal reliability for demanding applications.

Stackup Planning Tips

Effective stackup planning requires collaboration between the designer and the PCB manufacturer. Early in the design process, share your stackup requirements with the manufacturer to confirm that the proposed construction is achievable with their process capabilities and standard materials.

Maintain symmetry in the stackup to minimise warpage during lamination. An asymmetric stackup can cause the board to bow or twist, creating assembly problems and potentially affecting reliability. Ensure that copper distribution is balanced across all layers and that prepreg and core thicknesses are symmetric about the centre of the board.

Document your stackup clearly in the fabrication notes, specifying material types, layer thicknesses, copper weights, and any special requirements. A well-documented stackup reduces the risk of manufacturing errors and ensures that your design intent is clearly communicated to the fabricator.